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The 2006 World Congress in Computer Science
Computer Engineering, and Applied Computing

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(  J  u  n  e    2  6  -  2  9,    2  0  0  6 )

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CDES'06 / CNAN'06: June 27, 2006 Schedule

Last modified 2006-06-03 20:41

To select a different day CLICK HERE

6:30am - 5:00pm:  Registration (Second Floor, Conference Lobby: 1-5)


08:20 - 10:20am:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to CDES/CNAN conference participants
                  (sessions belonging to other joint conferences in this event.)
                  Therefore, you are encouraged to also check the schedules for
                  other joint conferences.  (In particular, schedules for
                  PDPTA'06, ESA'06, and ERSA'06).

10:20 - 10:40am:  BREAK


SESSION 1-CDES:   HIGH-PERFORMANCE SYSTEMS AND DESIGN ISSUES
                  Chair: Dr. Hussain Al-Asaad
                  University of California, Davis, California, USA
                  June 27, 2006 (Tuesday); 10:40am - 12:20pm
                  (LOCATION: Meeting Room 3)

10:40 - 11:00am:  An FPGA-Based Experiment Platform for Hardware Software Codesign and
                  Hardware Emulation
                  Yajuvendra Nagaonkar and Mark L. Manwaring
                  Brigham Young University, USA

11:00 - 11:20am:  New DSP Benchmark Based on Selectable Mode Vocoder (SMV)
                  E. Hu, C. S. Ku, A. Russo, B. Su, and J. Wang
                  William Paterson University, Wayne, New Jersey, USA
                  Nortel Network, Canada

11:20 - 11:40am:  Improving the System Performance by a Dynamic File Prediction Model
                  Tsozen Yeh, Joseph Arul, Kuo-Hsin Tien, I-Fan Chen, and Jia-Shian Wu
                  Fu Jen Catholic University, Taiwan

11:40 - 12:00pm:  A Generic Framework for Rapid Prototyping of System-on-Chip Designs
                  Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jurgen Teich
                  University of Erlangen-Nuremberg, Germany

12:00 - 12:20pm:  Hybrid Error-Detection Approach with No Detection Latency for
                  High-Performance Microprocessors
                  Yung-Yuan Chen, Kuen-Long Leu and Li-Wen Lin
                  Chung-Hua University, Hsin-Chu, Taiwan

12:20 - 01:20pm:  LUNCH (On Your Own)


01:20 - 02:40pm:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to CDES/CNAN conference participants
                  (sessions belonging to other joint conferences in this event.)
                  Therefore, you are encouraged to also check the schedules for
                  other joint conferences.  (In particular, schedules for
                  PDPTA'06, ESA'06, and ERSA'06).


02:40 - 03:20pm:  DISCUSSION SESSION A-CDES (Refreshments will be available)
                  June 27 (Tuesday)
                  (LOCATION: Hallways - Meeting Rooms 1-5)
                  List of papers appears at the end of CDES's schedule.


03:20 - 06:00pm:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to CDES/CNAN conference participants
                  (sessions belonging to other joint conferences in this event.)
                  Therefore, you are encouraged to also check the schedules for
                  other joint conferences.  (In particular, schedules for
                  PDPTA'06, ESA'06, and ERSA'06).


06:00 - 9:00pm:   TWO TUTORIALS (planned)

                  CONFERENCE TUTORIAL C
                  Heterogeneous Parallel and Distributed Computing: Model,
                  Resource Management, and Robustness
                  Prof. H. J. Siegel
                  Colorado State University, Fort Collins, Colorado, USA
                  June 27, 2006 (Tuesday)
                  (LOCATION: Meeting Room 1)

                  CONFERENCE TUTORIAL D
                  Security, Privacy, Computing, and Data Management
                  Kenneth W. Kousky* and Bon K. Sy**
                  *CEO, IP3, Inc., USA
                  **Queens College of the City of New York, New York, USA
                  June 27, 2006 (Tuesday)
                  (LOCATION: Meeting Room 3)
DISCUSSION SESSION
                   DISCUSSION SESSION A-CDES/CNAN
                      June 27 (Tuesday), 2006
                       RRR/SRP/PST Papers
                         2:40 - 3:20pm
         (LOCATION: Hallways/Lobby - Meeting Rooms 1-5)

LIST OF PAPERS IN DISCUSSION SESSION A-CDES/CNAN:

O.  A Reversible Programmable Logic Array (RPLA) Using Fredkin and
    Feynman Gates for Industrial Electronics and Applications
    Himanshu Thapliyal* and Hamid R. Arabnia
    *IIIT Hyderabad, India; **University of Georgia, Georgia, USA
O.  Protein Secondary Structure Prediction Accuracy versus Reduction Methods
    Saad Osman Abdalla and Safaai Deris
    Al Ghurair University, Dubai, UAE
    Universiti of Technologi Malaysia, Johor, Malaysia
O.  A Novel Essential Prime Implicant Identification Method for Exact
    Direct Cover Logic Minimization
    Sirzat Kahramanly and Suleyman Tosun
    Selcuk University, Turkey
O.  Using Task Recomputation During Application Mapping in Parallel
    Embedded Architectures
    Suleyman Tosun*, Mahmut Kandemir** and Hakduran Koc***
    *University of Selcuk, Turkey
    **Pennsylvania State University, USA
    ***Syracuse University, USA
O.  Modeling and Realization of the Floating Point Inverse Square
    Root, Square Root, and Division unit (fP ISD) Using VHDL and FPGAS
    Jaafar Alghazo
    University of Central Florida, USA

To select a different day CLICK HERE


Administered by
Universal Conference Management Systems & Support (UCMSS)
San Diego, California, USA

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