CDES'06 / CNAN'06: June 29, 2006 Schedule

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06:30a - 12:01p:  Registration (Second Floor, Conference Lobby: 1-5)


08:20 - 10:00am:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to CDES/CNAN conference participants
                  (sessions belonging to other joint conferences in this event.)
                  Therefore, you are encouraged to also check the schedules for
                  other joint conferences.  (In particular, schedules for
                  PDPTA'06, ESA'06, and ERSA'06).

10:00 - 10:20am:  BREAK

10:20 - 10:40am:  FREE SLOT

SESSION 6-CDES/CNAN: BIO-INSPIRED AND NANO-SCALE INTEGRATED COMPUTING
                  Chair: Prof. Mary M. Eshaghian-Wilner, UCLA, USA
                  June 29, 2006 (Thursday);  10:40am - 12:40pm
                  (LOCATION: Meeting Room 3)

10:40 - 11:00am:   Opening Remarks
                   Prof. Mary M. Eshaghian-Wilner, UCLA, USA

11:00 - 11:20am:   Hierarchical Multi-Scale Architectures with Spin Waves1
                   M. M. Eshaghian-Wilner, A. Khitun, S. Navab, and K. Wang
                   University of California, Los Angeles, California, USA

11:20 - 11:40am:   CMOL FPGA Circuits
                   Dmitri B. Strukov and Konstantin K. Likharev
                   Stony Brook University, New York, USA

11:40 - 12:00pm:   Integrity and Integration Issues for Nanotube Based Systems
                   Tulin Mangir and Chuhee Kwon
                   California State University Long Beach, California, USA

12:00 - 12:20pm:   Towards a Nanoscale Artificial Cortex
                   Alice C. Parker, Aaron K. Friesz, and Afshaneh Pakdaman
                   University of Southern California, Los Angeles, California, USA

12:20 - 12:40pm:   Graph Formations of Partial-Order Multiple-Sequence Alignments
                   Using Nano- and Micro-Scale Reconfigurable Meshes
                   M. M. Eshaghian-Wilner, J. Lau, D. Shin and S. Navab
                   University of California, Los Angeles, California, USA


12:40 - 01:20pm:  LUNCH (On Your Own)


SESSION 7-CDES/CNAN:   NANOTECHNOLOGY
                  Chair: Prof. Tulin E. Mangir
                  California State University Long Beach, California, USA
                  June 29, 2006 (Thursday);  1:20pm - 2:20pm
                  (LOCATION: Meeting Room 3)

01:20 - 01:40pm:  Compilation for Future Nanocomputer Architectures     
                  Thomas P. Way
                  Villanova University, USA

01:40 - 02:00pm:  MolML: An Abstract Scripting Language for Assembly of Mechanical 
                  Nanocomputer Architectures 
                  Bryan W. Wagner and Thomas P. Way
                  Villanova University, USA

02:00 - 02:20pm:  Teraflop Computing for Nanoscience      
                  Yang Wang*, G.M. Stocks**, Aurelian Rusanu**, D.M.C. Nicholson**, 
                  Markus Eisenbach**, J.S. Faulkner***
                  *Pittsburgh Supercomputing Center, USA
                  **Oak Ridge National Laboratory, USA
                  ***Florida Atlantic University, USA


02:40 - 03:20pm:  DISCUSSION SESSION B-CDES (Refreshments will be available)
                  June 29 (Thursday)
                  (LOCATION: Hallways - Meeting Rooms 1-5)
                  List of papers appears at the end of CDES's schedule.


03:20 - 05:20pm:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to CDES/CNAN conference participants
                  (sessions belonging to other joint conferences in this event.)
                  Therefore, you are encouraged to also check the schedules for
                  other joint conferences.  (In particular, schedules for
                  PDPTA'06, ESA'06, and ERSA'06).

                   DISCUSSION SESSION B-CDES/CNAN
                      June 29 (Thursday), 2006
                       RRR/SRP/PST Papers
                         2:40 - 3:20pm
         (LOCATION: Hallways/Lobby - Meeting Rooms 1-5)

LIST OF PAPERS IN DISCUSSION SESSION B-CDES/CNAN:

O.  ANN-Based Spiral Inductor Parameter Extraction and Layout Re-Design
    A. Ilumoka and Yeonbum Park
    University of Hartford, CT, USA
O.  Zero Detect-Based Low Power Register File Access
    Ing. Moises A. Zarate S., Luis Alfonso Villa Vargas,
    Oscar Camacho Nieto, M. en C. Osvaldo Espinosa Sosa
    Centro de Investigacion en Computacion CIC-IPN, Mexico and
    Instituto Mexicano del Petroleo IMP, Mexico
O.  Simulation of a Turing Machine Using EndoII Splicing Rules
    Kamala Krithivasan, Anshu Bhatia, and Chandra T.S.
    IIT Madras, India
O.  A New Processor Architecture with a New Program Driving Method
    Xiaobo Li, Ke Luo, Xiangdong Cui, Lalin Jiang, Huiping Zhou,
    Xiaoqiang Ni, Chiyuan Ma, Jinghui Jiang, Zhou Zhou
    Changsha University of Science and Technology, P. R. China
O.  A Configuration Concept for a Massively Parallel FPGA Architecture
    Sandeep Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer,
    Manfred Schimmler
    Christian-Albrechts-University of Kiel, Germany
    Ruhr University Bochum, Germany
O.  A Computer Algebra Algorithm for the Symbolic Solution of a Problem
    involving the diffusion of adatoms on a Circular Wafer when
    sculpting a Nanopore with an Ion Beam
    Esteban Garcia Tamayo and Juan Ospina G.
    EAFIT University, Medellin - Colombia

 

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