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The 2006 World Congress in Computer Science
Computer Engineering, and Applied Computing

L   a   s     V   e  g  a  s,    N  e  v  a  d  a,    U  S  A   
(  J  u  n  e    2  6  -  2  9,    2  0  0  6 )

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ERSA'06: June 27, 2006 Schedule

Last modified 2006-06-04 01:02

To select a different day CLICK HERE

6:30am - 5:00pm:  Registration (Second Floor, Conference Lobby: 1-5)


SESSION 2-ERSA    (Continued):  RECONFIGURABLE MULTIPROCESSORS AND SUPERCOMPUTING
                  Chair: Maya B. Gokhale, Los Alamos National Laboratory, USA
                  June 27, 2006 (Tuesday);  8:20am - 10:00am
                  (LOCATION: Conference Room G)

08:20 - 08:40am:  Group-Alignment Based Accurate Floating-Point Summation
                  on FPGAs
                  Chuan He, Guan Qin, Mi Lu, and Wei Zhao
                  Texas A&M University, College Station, Texas, USA

08:40 - 09:00am:  Code Partitioning for Reconfigurable High-Performance
                  Computing: A Case Study
                  Volodymyr Kindratenko
                  University of Illinois at Urbana-Champaign, Illinois, USA


09:00 - 09:30am:  DISTINGUISHED PAPER:
                  Floating-Point Unit Reuse in an FPGA Implementation of a
                  Ray-Triangle Intersection Algorithm
                  Craig Ulmer*, Adrian Javelo**
                  *Sandia National Laboratories, USA
                  **University of California, Los Angeles, USA


09:30 - 10:00am:  INVITED PAPER:
                  The Case for High Level Programming Models for Reconfigurable
                  Computers
                  David Andrews
                  University of Kansas, USA

10:00 - 10:30am:  COFFEE BREAK


SESSION 2-ERSA    (Continued):  RECONFIGURABLE MULTIPROCESSORS AND SUPERCOMPUTING
                  Chair: Maya B. Gokhale, Los Alamos National Laboratory, USA
                  June 27, 2006 (Tuesday);  10:30am - 11:10am
                  (LOCATION: Conference Room G)

10:30 - 11:10am:  INVITED PAPER
                  Promises and Pitfalls of Reconfigurable Supercomputing
                  Maya B. Gokhale
                  Los Alamos National Laboratory, USA


SESSION 3-ERSA:   EMERGING TECHNOLOGIES AND ARCHITECTURES
                  Chair: Guy Gogniat, University of of Bretagne Sud, France
                  June 27, 2006 (Tuesday);  11:10am - 1:50pm
                  (LOCATION: Conference Room G)

11:10 - 11:30am:  Efficient Use of Communications Between an FPGAs Embedded
                  Processor and its Reconfigurable Logic
                  Joshua Noseworthy and Miriam Leeser
                  Northeastern University, Boston, USA


11:30 - 12:00pm:  DISTINGUISHED PAPER:
                  Process Isolation for Reconfigurable Hardware
                  Herwin Chan*, Patrick Schaumont**, and Ingrid Verbauwhede***
                  *University of California, Los Angeles, USA
                  **Virginia Tech, USA
                  ***K.U.Leuven, Belgium


12:00 - 01:00pm:  LUNCH (On Your Own)

01:00 - 01:30pm:  DISTINGUISHED PAPER:
                  Non-Volatile FPGA Based on MRAM Technology
                  Weisheng Zhao*, E. Belhaire*, V. Javerliac**, C. Chappert*,
                  and B. Dieny**
                  *Institut d'Electronique Fondamentale, Univ. Paris, France
                  **SPINTEC, CEA Grenoble/CNRS, France

01:30 - 01:50pm:  Differential Reconfiguration Architecture suitable for a
                  Holographic Memory
                  Minoru Watanabe*, Mototsugu Miyano, and Fuminori Kobayashi
                  Kyushu Institute of Technology, Japan


01:50 - 03:20pm:  DISCUSSION SESSIONS (Refreshment will be available)
                  June 27, 2006 (Tuesday)
                  (LOCATION: Conference Room G)

                  I. DISCUSSION SESSION - SHORT PAPERS:
                  O.  Multi-Mode Operator for SHA-2 Hash Functions
                      Ryan Glabb, Laurent Imbert, Graham Jullien, Arnaud Tisseraud,
                      and Nicolas Veyrat-Charvillon
                      University of Calgary, Canada
                      Ecole Normale Superieure de Lyon, France
                  O.  Re-Configurable Architecture for Elementary Functions Evaluation
                      M. Anane, H. Bessalah, Nadjia Anane, M. Issad, and H. Salhi
                      Center of Development of Advanced Technologies, Algeria
                  O.  Extrinsic Embedded Hardware Evolution of Block-based Neural
                      Networks
                      Saumil G. Merchant, Gregory D. Peterson, and Seong G. Kong
                      University of Tennessee, Knoxville, Tennessee, USA
                  O.  Hardware Acceleration of Parallel Lagged-Fibonacci Pseudo
                      Random Number Generation
                      Yu Bi, Gregory D. Peterson, Lee Warren, and Robert Harrison
                      University of Tennessee, Knoxville, Tennessee, USA
                  O.  Combinatorial Optimization in Mapping Generalized Template
                      Matching onto Reconfigurable Computers
                      Xuejun Liang and Qutaibah Malluhi
                      Jackson State University, Jackson, MS, USA
                  O.  GifT: A Gravity-Directed and Life-Time Based Algorithm for
                      Temporal Partitioning of Data Flow Graphs
                      Farhad Mehdipour*, Morteza Saheb Zamani*, Mehdi Sedighi*,
                      Kazuaki Murakami**, and Hamid Noori**
                      *Amirkabir University of Technology, Tehran, Iran
                      **Kyushu University, Japan
                  O.  Architecture Support for Runtime 2D Partial Reconfiguration
                      Fei Wang and Jack Jean
                      Wright State University, USA

                  II. DISCUSSION SESSION - POSTER PAPERS:
                  O.  A Logic Synthesis and Place and Route Environment for ORGAs
                      Minoru Watanabe and Fuminori Kobayashi
                      Kyushu Institute of Technology, Japan
                  O.  Shield Effect Analysis for a Gate Array on An Optically
                      Reconfigurable Gate Array
                      Minoru Watanabe and Fuminori Kobayashi
                      Kyushu Institute of Technology, Japan
                  O.  Intracellular Fluorescence Biological Molecule For Bistable
                      Liquid Crystal By Metabolically Cell
                      Chia -Fu Chang, Wi-Ci Chen, and Zou-ni Win
                      Tainan Hsien, Taiwan
                  O.  A Generic Lookup Cache Architecture for Network Processing
                      Applications
                      Janardhan Singaraju and John A. Chandy
                      University of Connecticut, USA
                  O.  Synthesis of Object Oriented Models on Reconfigurable Hardware
                      Giovanni Agosta, Francesco Bruschi, Marco Santambrogio,
                      and Donatella Sciuto
                      Politecnico di Milano, Italy
                  O.  A Dual Configuration BIST-Based Modular Diagnosis Methodology
                      for Digital Embedded IP Cores in FPGAs
                      Alireza Sarvi, Jenny Fan, and Reto Stamm
                      Xilinx, Inc., San Jose, California, USA
                  O.  Complexity and Performance Evaluation of Two Partial
                      Reconfiguration Interfaces on FPGAs: a Case Study
                      Heng Tan*, Ronald F. DeMara*, Anuja J. Thakkar*, Abdel Ejnioui*,
                      and Jason D. Sattler**
                      *University of Central Florida, Florida, USA
                      **Space Photonics Inc.


03:20 - 06:00pm:  Note: There are a number of sessions (not listed here) that
                  are of significant interest to ERSA conference participants
                  (sessions belonging to other joint conferences in this event.)
                  During this period, you are encouraged to participate in
                  sessions belonging to PDPTA'06, CDES'06, ESA'06, IPCV'06,
                  FECS'06, or BIOCOMP'06).


06:00 - 9:00pm:   TWO TUTORIALS (planned)

                  CONFERENCE TUTORIAL C
                  Heterogeneous Parallel and Distributed Computing: Model,
                  Resource Management, and Robustness
                  Prof. H. J. Siegel
                  Colorado State University, Fort Collins, Colorado, USA
                  June 27, 2006 (Tuesday)
                  (LOCATION: Meeting Room 1)

                  CONFERENCE TUTORIAL D
                  Security, Privacy, Computing, and Data Management
                  Kenneth W. Kousky* and Bon K. Sy**
                  *CEO, IP3, Inc., USA
                  **Queens College of the City of New York, New York, USA
                  June 27, 2006 (Tuesday)
                  (LOCATION: Meeting Room 3)


To select a different day CLICK HERE


Administered by
Universal Conference Management Systems & Support (UCMSS)
San Diego, California, USA

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