CDES'07: June 27, 2007 Schedule
Last modified
2007-06-15 22:13
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6:45am - 5:00pm: Registration (Second Floor, Conference Lobby: 1-5)
08:00a - 02:40p: During this period, CDES'07 attendees are encouraged to participate
in sessions belonging to ESA'07, PDPTA'07, or ERSA'07. These
sessions discuss topics that overlap the scope of CDES.
02:40 - 03:20pm: DISCUSSION SESSION B-CDES (Refreshments will be available)
June 27 (Wednesday)
(LOCATION: Hallways - Ballrooms 1-5)
O. Finite Element Technique to Mimic the Vibrational Behavior
of Single-Walled Carbon Nanotubes
A. Sakhaee-Pour*, M. T. Ahmadian, and A. Vafai
Center of Excellence in Design, Robotics and Automation (CEDRA), Iran
O. Pipeline Scheduling with Dual Voltages for Low Power Design
Jong Tae Kim
Sungkyunkwan University, Korea
O. Design of Network Security Platform with two XFI Interfaces
Using Network Processor
Yong-Sung Jeon*, Sang-Woo Lee, and Ki-Young Kim
Electronics and Telecommunications Research Institude, Korea
O. Performance Analysis of an Intel Pentium-4 Based Personal
Computer for Multiple Sequence Alignment
Pradeep Nair* and Eugene John
University of Texas, San Antonio, Texas, USA
O. DECM with Min-Max Delays
Norbert Giambiasi and Jean-Luc Paillet*
Universites de Marseille, France
SESSION 4-CDES: POWER AND ENERGY + NOVEL ALGORITHMS AND APPLICATIONS,
CIRCUIT/HARDWARE DESIGN, AND TOOLS
Chairs: Dr. Hussain Al-Asaad* and Dr. GuoQiang (George) Peng**
*University of California, Davis, California, USA
**Toronto, Canada
June 27, 2007 (Wednesday); 03:20pm - 06:00pm
(LOCATION: Gold Room)
03:20 - 03:40pm: Low Energy I-Cache for Embedded Processors
Kashif Ali, Mokhtar Aboelaze*, and Suprakash Datta
Queens University York University, Canada
03:40 - 04:00pm: Methods of Error Detection in Arithmetic Operations
Huan-Yu Tu* and Fen-lin Wu
Eastern Connecticut State University, USA
04:00 - 04:20pm: Recurring Pattern Identification and its Application to
Instruction Set Extension
Nagaraju Pothineni*, Anshul Kumar, and Kolin Paul
Indian Institute of Technology, Delhi, India
04:20 - 04:40pm: Compiling a Mechanical Nanocomputer Adder
Thomas P. Way* and Tao Tao
Villanova University, Villanova, USA
04:40 - 05:00pm: Test Pattern Generation Method for VHDL Descriptions with
BFS-DEVS Simulator
F. Giamarchi*, L. Capocchi, D. Federici, and P. A. Bisgambiglia
University of Corsica, France
05:00 - 05:20pm: Efficient Global Fault Collapsing For Combinational
Library Modules
Hussain Al-Asaad
University of California, Davis, California, USA
05:20 - 05:40pm: FREE SLOT
05:40 - 06:00pm: FREE SLOT
06:00 - 09:00pm: FOUR TUTORIALS (planned)
Factor Graphs for Advanced Algorithm Design in Wireless Communications
Dr. Henk Wymeersch
Massachusetts Institute of Technology, Cambridge, Massachusetts, USA
Location: Ballroom 2
Data Mining in Time Series and Multimedia Databases
Dr. Eamonn Keogh
University of California - Riverside, California, USA
Location: Ballroom 1
Cryptographic Features and Applications in Java (and C++)
Prof. Ray Kresman
Bowling Green State University, USA
Location: Ballroom 4
Mobile Terminal Software Architecture - Present and Future
S. Vijay Anand
General Manager, SASKEN Communication Technologies Limited - CTO Team, India
Location: Ballroom 3
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