CDES'08: July 15, 2008 Schedule

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6:45am - 5:00pm:  Registration (Second Floor, Conference Lobby: 1-5)


SESSION 2-CDES:   HIGH-PERFORMANCE SYSTEMS AND DESIGN ISSUES + APPLICATIONS + TOOLS/OS
                  Chair: TBA
                  July 15, 2008 (Tuesday); 08:00am - 10:00am
                  (LOCATION: Titanium Room)

08:00 - 08:20am:  A Specification Methodology for the Optimal Layout of a 2-Stage
                  Interconnect Bus for Massively Parallel Architectures
                  Gerd Pfeiffer and Manfred Schimmler
                  Christian-Albrechts-University Kiel, Germany

08:20 - 08:40am:  A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions
                  for Multi-Output Incompletely Specified Boolean Functions
                  M. Sampson, D. Voudouris, and G. Papakonstantinou
                  National Technical University of Athens, Greece

08:40 - 09:00am:  A Novel Architecture for Fast Polynomial Division for Binary Coefficients
                  Tarang H. Popat and Kaushal D. Buch
                  eInfochips Ltd, India

09:00 - 09:20am:  Nanowire Crossbar PLA with Adaptive Variable Redundancy
                  Mandar Vijay Joshi and Waleed K. Al-Assadi
                  Missouri University of Science and Technology, USA

09:20 - 09:40am:  Nanocompilation for the Cell Matrix Architecture
                  Thomas Way, Rushikesh Katikar, and Purushotham Ch
                  Villanova University, Villanova, PA, USA

09:40 - 10:00am:  Scalable Directory Organization for Tiled CMP Architectures
                  Alberto Ros, Manuel E. Acacio, and Jose M. Garcia
                  Universidad de Murcia, Spain

10:00 - 10:20am:  BREAK


SESSION 3-CDES:   SIMULATION, MODELING, AND TESTING
                  Chair: Prof. Waleed K. Al-Assadi
                  Missouri University of Science and Technology, USA
                  July 15, 2008 (Tuesday); 10:20am - 11:00am
                  (LOCATION: Titanium Room)

10:20 - 10:40am:  High-Level Automatic Test Generation for VHDL Descriptions
                  F. Giamarchi, L. Capocchi, D. Federici, and P.A. Bisgambiglia
                  University of Corsica, France

10:40 - 11:00am:  Single-Electron Tunneling Circuits for Image Processing Applications
                  Costa Gerousis* and David Ball
                  Christopher Newport University, Virginia, USA


SESSION 4-CDES:   POWER AND ENERGY (Chair: TBA)
                  Chair: Prof. Waleed K. Al-Assadi
                  Missouri University of Science and Technology, USA
                  July 15, 2008 (Tuesday); 11:20am - 12:20p
                  (LOCATION: Titanium Room)

11:00 - 11:20am:  Effective Dynamic Voltage and Frequency Scaling Algorithms
                  Mahmoud Abdel-Fattah** and Khaled El-Ayat*
                  *American University in Cairo, Egypt; **Microsoft Corporation

11:20 - 11:40am:  Effects of Register File Organization on Leakage Power Consumption
                  Pradeep Nair, Savithra Eratne, and Eugene John
                  University of Texas at San Antonio, Texas, USA

11:40 - 12:00pm:  How to Really Save Computer Energy?
                  Vasily Moshnyaga
                  Fukuoka University, Japan

12:00 - 12:20pm:  FREE SLOT

12:20 - 01:20pm:  LUNCH (On Your Own)

01:20 - 06:00pm:  During this period, CDES'08 attendees are encouraged to participate
                  in sessions belonging to PDPTA'08, ICWN'08, MSV'08, SAM'08,
                  ESA'08, FECS'08, CIC'08, or ERSA'08.  These sessions discuss
                  topics that overlap the scope of CDES'08.


06:00 - 09:30pm:  Tutorials (please see the list of tutorials)

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