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ERSA'09 Keynote- Prof. Viktor K. Prasanna
Last modified
2009-07-03 11:42
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Algorithm Design for Reconfigurable Computing Systems
Professor Viktor K. Prasanna Fellow, IEEE; Fellow ACM Charles Lee Powell Chair in Engineering; Professor of Electrical Engineering and Computer Engineering; and Professor of Computer Science Executive Director of USC-Infosys Center for Advanced Software Technologies (CAST), University of Southern California, USA Date: July 13, 2009 Time: 10:45 - 11:35 AM Location: Lance Burton Theater |
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Reconfigurable devices and systems have evolved dramatically over the past decade. Recently, several state-of-the-art high end platforms have incorporated FPGAs (Field Programmable Gate Arrays) for application acceleration. This talk explores algorithmic optimizations for accelerating
a wide variety of applications including Gigabit rate deep packet inspection, high speed packet classification in Internet routers, embedded computing and scientific computing. We illustrate the performance improvements for such systems and demonstrate the suitability of FPGAs for these computations. The performance of FPGAs is also compared against those of state-of-the-art embedded processors, general purpose processors, and DSPs (Digital Signal Processors) for floating point intensive applications. We conclude by highlighting the challenges in further exploiting this technology for application acceleration.
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Viktor K. Prasanna (V. K. Prasanna Kumar) is Charles Lee Powell Chair in Engineering and is Professor of Electrical Engineering and Professor of Computer Science at the University of Southern California (USC). He is the executive director of the USC-Infosys Center for Advanced Software Technologies (CAST). He is an associate member of the Center for Applied Mathematical Sciences (CAMS) and a member of USC-Chevron Center of Excellence for Research and Academic Training on Interactive Smart Oilfield Technologies (CiSoft) at USC. His research interests include High Performance Computing, Parallel and Distributed Systems, Reconfigurable Computing, Network Computing and Embedded Systems. He received his BS in Electronics Engineering from the Bangalore University, MS from the School of Automation, Indian Institute of Science and Ph.D in Computer Science from the Pennsylvania State University.
Prasanna has published extensively and consulted for industries in the above areas. He is the Steering Committee Co-Chair of the International Parallel & Distributed Processing Symposium (IPDPS) [merged IEEE International Parallel Processing Symposium (IPPS) and Symposium on Parallel and Distributed Processing (SPDP)]. He is the Steering Committee Chair of the International Conference on High Performance Computing (HiPC). In the past, he has served on the editorial boards of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Parallel and Distributed Systems (TPDS), Journal of Pervasive and Mobile Computing, and the Proceedings of the IEEE. He serves on the editorial boards of the Journal of Parallel and Distributed Computing and the ACM Transactions on Reconfigurable Technology and Systems. During 2003-'06, he was the Editor-in-Chief of the IEEE Transactions on Computers. He was the founding chair of the IEEE Computer Society Technical Committee on Parallel Processing. He is a Fellow of the IEEE and the ACM. He is a recipient of the 2005 Okawa Foundation Grant.
