CDES'09: July 14, 2009 Schedule

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6:45am - 5:00pm:  REGISTRATION (Second Floor, Conference Lobby: 1-5)


08:00a - 04:40p:  During this period, CDES'09 attendees are encouraged to participate
                  in sessions belonging to PDPTA'09, ICWN'09, MSV'09, SAM'09,
                  ESA'09, FECS'09, or ERSA'09.  These sessions discuss topics
                  that significantly overlap the scope of CDES'09.


SESSION 2-CDES:   MEMORY, CACHE, STORAGE, FILES, NETWORKING + DEVICE DRIVERS
                  Chair: TBA
                  July 14, 2009 (Tuesday); 04:40pm - 06:00pm
                  (LOCATION: Silver Room)

04:40 - 05:00pm:  Some Power-Law Scaling Limits to Computer Memory Architectures
                  Jack K. Horner
                  Independent researcher

05:00 - 05:20pm:  Indirect-Mapped Caches: Approximating Set-Associativity with
                  Direct-Mapped Caches
                  Jia-Jhe Li and Yuan-Shin Hwang
                  National Tsing Hua University, Taiwan

05:20 - 05:40pm:  Dynamic Switching Techniques of Accessing L1/L2 Cache on an SMT Processor
                  Yoshiyasu Ogasawara, Pulung Waskito, Shinobu Miwa and Hironori Nakajo
                  Tokyo University of Agriculture and Technology, Japan

05:40 - 06:00pm:  Saving Cache Memory Using a Locking Cache in Real-Time Systems
                  A. Marti, F. Rodriguez, R. Ors, J. J. Serrano
                  Technical University of Valencia, Spain


06:00 - 09:00pm:  KEYNOTE & INVITED PRESENTATIONS + TUTORIALS
                  (Please see the lists at the begining of this booklet)

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