CDES'10: July 14, 2010 Schedule

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6:45am - 5:00pm:  REGISTRATION (Second Floor, Conference Lobby: 1-5)


SESSION 4-CDES:   ALGORITHMS, LOGIC, CIRCUIT/HARDWARE DESIGN, & TOOLS
                  Co-Chairs: Prof. Hussain Al-Asaad* and Prof. Srinivasa Vemuru**
                  *University of California at Davis, California, USA
                  **Ohio Northern University, Ohio, USA
                  July 14, 2010 (Wednesday); 08:00am - 09:00am
                  (LOCATION: Chapel)

08:00 - 08:20am:  The Design and Implementation of Partial Virtual Machine for
                  Device Driver Fault Isolation
                  Byoung Hong Lim, Inhyuk Kim, Young Ik Eom
                  Sungkyunkwan University, Suwon, Korea

08:20 - 08:40am:  Evolving More Testable Digital Combinational Circuits
                  N. Mirzaie, S. J. Seyyed Mahdavi, K. Mohammadi
                  Iran University of Science and Technology, Tehran, Iran

08:40 - 09:00am:  Real Time Redundancy Study of a Exponential Time Dependent Model
                  M. Sharifi, M. Hamedanian, M. Naghizadeh
                  Islamic Azad University, Qazvin, Iran


SESSION 5-CDES:   HPC AND DESIGN ISSUES + FPGA + EMBEDDED SYSTEMS
                  Chair: Prof. Srinivasa Vemuru, Ohio Northern University, Ohio, USA
                  July 14, 2010 (Wednesday); 09:00am - 10:20am
                  (LOCATION: Chapel)

09:00 - 09:20am:  The Thread Control Mechanism for Multithreading Processor
                  Takanori Matsuzaki, Nozomu Urashima, Makoto Amamiya
                  Kinki University, Japan;
                  Kyushu University, Japan

09:20 - 09:40am:  Built-In Self-Test Circuit Optimization for Embedded Cores
                  Srinivasa Vemuru, Sravani Kristem, Mohammed Niamat
                  Ohio Northern University, Ohio, USA;
                  University of Toledo, USA

09:40 - 10:00am:  Leakage and Access Time Tradeoffs for Cache in High Performance
                  Microprocessors
                  Savithra Eratne, Claudia Romo, Eugene John and Byeong K. Lee
                  University of Texas at San Antonio, Texas, USA

10:00 - 10:20am:  FREE SLOT

10:20 - 10:40am:  BREAK


10:40a - 03:00p:  During this period, CDES'10 attendees are encouraged to participate
                  in sessions belonging to PDPTA'10, ERSA'10, ESA'10, ICWN'10,
                  MSV'10, SAM'10, and FECS'10. These sessions discuss topics that
                  significantly overlap the scope of CDES'10.


03:00 - 03:40pm:  DISCUSSION/POSTER SESSION C-CDES (Refreshments will be available)
                  July 14, 2010 (Wednesday)
                  (LOCATION: Hallways of Ballrooms 1-5)

                  O. Planning and Designing Model of the Synthesized Design Method
                     Xiaopeng Li, Wei Sun, Hui Ma, Bangchun Wen
                     Northeastern University, Liaoning, P. R. China
                  O. Performance Evaluation of Multimedia Extensions on Variable
                     Many-Core Processors
                     Jong-Myon Kim, Yong-Min Kim, Cheol-Hong Kim
                     University of Ulsan, Ulsan, Korea;
                     Chonnam National University, Gwangju, Korea
                  O. There will also be a number of other papers.

03:40 - 06:00pm:  During this period, CDES'10 attendees are encouraged to participate
                  in sessions belonging to PDPTA'10, ERSA'10, ESA'10, ICWN'10,
                  MSV'10, SAM'10, and FECS'10. These sessions discuss topics that
                  significantly overlap the scope of CDES'10.


06:00 - 09:00pm:  KEYNOTES & INVITED PRESENTATIONS + TUTORIALS
                  (Please see the lists at the begining of this booklet)

To select a different schedule CLICK HERE